Green Hills Software, the worldwide leader in high assurance operating systems, today announced DURA Automotive Systems’ selection of the Green Hills Platform for ADAS, featuring the safe and secure INTEGRITY® real-time operating system (RTOS), to power DURA’s Highly Automated Driving control system. The control system integrates vision, vehicle and range-based sensor data while safely and securely instructing crucial systems for brakes, steering and powertrain. Utilizing the INTEGRITY secure and safe separation architecture on the 64-bit NXP S32V200 family of automotive processors, the Highly Automated Driving control system is perfectly suited for automakers building open, highly secure and scalable platforms with the latest in Advanced Driver Assistance System (ADAS) features.
“Developers choose Green Hills hardware debug solutions to get the best performance, excellent value, and superior support,” said David Kleidermacher, CTO, Green Hills Software. “With these latest improvements, customers can upgrade their existing tools to debug and trace the latest processors while enjoying the most productive. For example, Green Hills Software announced its new µ-visor at CES 2021. The software targets high-availability applications running on multicore microcontrollers like Renesas’ RH850.
Highly Automated Driving Control System
Automakers are racing to introduce automated driving features with stringent levels of security and safety. DURA’s revolutionary Highly Automated Driving control system incorporates a dedicated control module, complete with software, vision, communication and range-based sensors. This module features sophisticated image processing algorithms and the necessary V2X hardware and software for the latest in vehicle-to-vehicle and vehicle-to-infrastructure communications. Green Hills INTEGRITY RTOS is the trusted execution environment to safely and securely run critical software functions for vision cognition, sensor fusion and vehicle dynamics. The system maintains a low power envelope that allows for passive cooling and compact packaging, making the system perfectly suited for integration by automakers worldwide.
“Our Highly Automated Driving control system is a watershed moment for car makers that seek a scalable, open architecture to develop highly secure, next-generation, semi-autonomous features,” said Nizar Trigui, chief operating officer at DURA. “We chose Green Hills INTEGRITY RTOS for its proven safety and security architecture as the trusted environment to execute our sophisticated algorithms for vision cognition and autonomous vehicle control.”
“Green Hills Software is very honored that DURA selected our INTEGRITY RTOS as the trusted execution environment for their Highly Automated Driving control system,” said Dan O’Dowd, founder and chief executive officer of Green Hills Software. “Dura’s Highly Automated Driving control system addresses automakers’ desire to achieve rapid deployment of next-generation autonomous features. Our safe and secure INTEGRITY coupled with its advanced MULTI® software development environment are widely used in safety-critical car subsystems by automotive OEMs and Tier 1s worldwide, and we’re proud to bring these strengths to the DURA solution.”
The Green Hills Platform for ADAS offers the safety certified INTEGRITY RTOS, INTEGRITY Multivisor™ secure virtualization, and safety-certified MULTI development tools, leading the industry for developing, certifying and deploying ADAS devices on 32- and 64-bit SoCs such as the NXP S32V200 family of processors:
- INTEGRITY RTOS, the most trusted separation architecture, safely and securely runs critical multicore ADAS applications.
- INTEGRITY Multivisor secure virtualization technology can safely run ISO 26262-certified applications alongside guest operating systems like Windows, Linux and Android, increasing the scalability and reuse within a customer’s platform.
- MULTI integrated software development environment features ISO 26262 ASIL D toolchain, multicore debugger, TimeMachine™ trace debugging, MISRA C support and many other integrated time-saving capabilities.
- Maximum vision processing performance through dual APEX-2 image cognition processor cores and Vision SDK from NXP.
- Maximum multimedia and signal processing performance from EEMBC® record-setting C/C++ compilers for ARM® Cortex™-A™ and Cortex-M cores, including optimized support for the ARM Neon™ instructions.
- Fully accelerated 3D graphics utilizing the Vivante GC3000 OpenGL graphics processing unit (GPU).
- Complete AUTOSAR-compliant application framework, allows AUTOSAR software components to seamlessly run with freedom from interference, enabling maximum software reuse.
Availability
DURA’s Highly Automated Driving Control system can be viewed at the NXP FTF Technology Forum, May 16-19 in both the DURA and Green Hills Technology Lab demonstration areas.
DSP/BIOS Link or DSPLINK is an IPC (interprocessor communications) scheme for passing messages and data in multiprocessor systems. In the case of the DaVinciDSP family from Texas Instruments, this scheme would allow passing of messages and data between an ARM client and a DSP server. DSPLINK can be used to implement a layer of software abstraction called a RPC that allows a remote function on the DSP to appear as local function calls in the ARM application code. The Codec Engine IPC communication layer is implemented using a RPC call scheme built on top of DSP/BIOS LINK.
Overview[edit]
DSP/BIOS LINK is implemented using shared memory and internal interrupts[clarification needed] from the ARM to the DSP and vice versa.
The shared memory protocol for IPC is implemented as follows:
- The ARM and DSP are programmed to a pre-determined memory address where a message will be sent from the ARM to the DSP; and another for messages sent from the DSP to the ARM.
- One processor sends messages to the other by writing the message into the pre-determined address and then sending an interrupt to signal the other processor that a new message is available. When transferring data buffers, only a pointer to a given buffer needs to be passed since the buffer resides in shared memory that is accessible to both the processors. ARM buffer addresses must be translated into physical addresses when being presented to the DSP, as the DSP does not have an MMU or a concept of virtual addressing.
- Once the processor receiving the message has read it, it marks a flag in shared memory to indicate that the message memory is now available to be rewritten with another message.
The DSP included in many DaVinci-based devices generally runs TI's DSP/BIOSRTOS. When multiple, heterogeneous cores are included in the device (e.g. DM644x), DSP/BIOS Link drivers run on both the ARM processor and the DSP to provide communication between the two.
Operating systems[edit]
A number of ARM9 operating systems support DSP/BIOS Link drivers:
- QNX Neutrino
- LEOs (RTOS)
